Changeset 834
- Timestamp:
- 01/01/11 22:12:24 (14 years ago)
- Files:
-
- branches/dmd-1.x/src/backend/cod4.c (modified) (1 diff)
- trunk/src/backend/cod4.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
- Modified
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- Moved
branches/dmd-1.x/src/backend/cod4.c
r828 r834 2662 2662 if (cx->Iop == 0x81 && (cx->Irm & modregrm(3,7,0)) == modregrm(3,4,0)) 2663 2663 { 2664 2664 // Convert AND of a word to AND of a dword, zeroing upper word 2665 2665 retregs = mask[cx->Irm & 7]; 2666 2666 cx->Iflags &= ~CFopsize; 2667 2667 cx->IEV2.Vint &= 0xFFFF; 2668 2668 goto L1; 2669 2669 } 2670 2670 } 2671 2671 if (op == OPs16_32 && retregs == mAX) 2672 2672 c2 = gen1(c2,0x98); /* CWDE */ 2673 2673 else if (op == OPs32_64 && retregs == mAX) 2674 2674 { c2 = gen1(c2,0x98); /* CDQE */ 2675 2675 code_orrex(c2, REX_W); 2676 2676 } 2677 2677 else 2678 2678 { 2679 2679 reg = findreg(retregs); 2680 2680 if (config.flags4 & CFG4speed && op == OPu16_32) 2681 2681 { // AND reg,0xFFFF 2682 c3 = genc2(NULL,0x81,modregrm (3,4,reg),0xFFFFu);2682 c3 = genc2(NULL,0x81,modregrmx(3,4,reg),0xFFFFu); 2683 2683 } 2684 2684 else 2685 2685 { 2686 2686 unsigned iop = (op == OPu16_32) ? 0x0FB7 : 0x0FBF; /* MOVZX/MOVSX reg,reg */ 2687 2687 c3 = genregs(CNIL,iop,reg,reg); 2688 2688 } 2689 2689 c2 = cat(c2,c3); 2690 2690 } 2691 2691 L1: 2692 2692 c3 = e1comsub ? getregs(retregs) : CNIL; 2693 2693 } 2694 2694 c4 = fixresult(e,retregs,pretregs); 2695 2695 c = cat4(c1,c2,c3,c4); 2696 2696 } 2697 2697 else if (*pretregs & mPSW || config.target_cpu < TARGET_80286) 2698 2698 { 2699 2699 // OPs16_32, OPs32_64 2700 2700 // CWD doesn't affect flags, so we can depend on the integer 2701 2701 // math to provide the flags. 2702 2702 retregs = mAX | mPSW; // want integer result in AX trunk/src/backend/cod4.c
r828 r834 2662 2662 if (cx->Iop == 0x81 && (cx->Irm & modregrm(3,7,0)) == modregrm(3,4,0)) 2663 2663 { 2664 2664 // Convert AND of a word to AND of a dword, zeroing upper word 2665 2665 retregs = mask[cx->Irm & 7]; 2666 2666 cx->Iflags &= ~CFopsize; 2667 2667 cx->IEV2.Vint &= 0xFFFF; 2668 2668 goto L1; 2669 2669 } 2670 2670 } 2671 2671 if (op == OPs16_32 && retregs == mAX) 2672 2672 c2 = gen1(c2,0x98); /* CWDE */ 2673 2673 else if (op == OPs32_64 && retregs == mAX) 2674 2674 { c2 = gen1(c2,0x98); /* CDQE */ 2675 2675 code_orrex(c2, REX_W); 2676 2676 } 2677 2677 else 2678 2678 { 2679 2679 reg = findreg(retregs); 2680 2680 if (config.flags4 & CFG4speed && op == OPu16_32) 2681 2681 { // AND reg,0xFFFF 2682 c3 = genc2(NULL,0x81,modregrm (3,4,reg),0xFFFFu);2682 c3 = genc2(NULL,0x81,modregrmx(3,4,reg),0xFFFFu); 2683 2683 } 2684 2684 else 2685 2685 { 2686 2686 unsigned iop = (op == OPu16_32) ? 0x0FB7 : 0x0FBF; /* MOVZX/MOVSX reg,reg */ 2687 2687 c3 = genregs(CNIL,iop,reg,reg); 2688 2688 } 2689 2689 c2 = cat(c2,c3); 2690 2690 } 2691 2691 L1: 2692 2692 c3 = e1comsub ? getregs(retregs) : CNIL; 2693 2693 } 2694 2694 c4 = fixresult(e,retregs,pretregs); 2695 2695 c = cat4(c1,c2,c3,c4); 2696 2696 } 2697 2697 else if (*pretregs & mPSW || config.target_cpu < TARGET_80286) 2698 2698 { 2699 2699 // OPs16_32, OPs32_64 2700 2700 // CWD doesn't affect flags, so we can depend on the integer 2701 2701 // math to provide the flags. 2702 2702 retregs = mAX | mPSW; // want integer result in AX
