Changeset 771
- Timestamp:
- 12/02/10 23:37:26 (14 years ago)
- Files:
-
- branches/dmd-1.x/src/backend/cod1.c (modified) (1 diff)
- branches/dmd-1.x/src/backend/cod2.c (modified) (2 diffs)
- branches/dmd-1.x/src/backend/cod3.c (modified) (1 diff)
- branches/dmd-1.x/src/backend/cod4.c (modified) (1 diff)
- branches/dmd-1.x/src/backend/el.c (modified) (1 diff)
- branches/dmd-1.x/src/iasm.c (modified) (1 diff)
- trunk/src/backend/cod1.c (modified) (1 diff)
- trunk/src/backend/cod2.c (modified) (2 diffs)
- trunk/src/backend/cod3.c (modified) (1 diff)
- trunk/src/backend/cod4.c (modified) (1 diff)
- trunk/src/backend/el.c (modified) (1 diff)
- trunk/src/iasm.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
- Modified
- Copied
- Moved
branches/dmd-1.x/src/backend/cod1.c
r770 r771 630 630 !(i == DX && op == 0xF7 && desmsk & mDX)) 631 631 { 632 632 /* if ES, then it can only be a load */ 633 633 if (i == ES) 634 634 { if (op != 0x8B) 635 635 goto L1; /* not a load */ 636 636 cs->Iop = 0x8C; /* MOV reg,ES */ 637 637 cs->Irm = modregrm(3,0,reg & 7); 638 638 if (reg & 8) 639 639 code_orrex(cs, REX_B); 640 640 } 641 641 else // XXX reg,i 642 642 { 643 643 cs->Irm = modregrm(3,reg & 7,i & 7); 644 644 if (reg & 8) 645 645 cs->Irex |= REX_R; 646 646 if (i & 8) 647 647 cs->Irex |= REX_B; 648 648 if (sz == 1 && I64 && i >= 4) 649 649 cs->Irex |= REX; 650 if (I64 && (sz == 8 || sz == 16)) 651 cs->Irex |= REX_W; 650 652 } 651 653 c = CNIL; 652 654 goto L2; 653 655 } 654 656 rm &= ~mask[i]; 655 657 } 656 658 } 657 659 } 658 660 659 661 L1: 660 662 c = getlvalue(cs,e,keepmsk); 661 663 if (offset == REGSIZE) 662 664 getlvalue_msw(cs); 663 665 else 664 666 cs->IEVoffset1 += offset; 665 667 if (I64 && reg >= 4 && sz == 1) // if byte register 666 668 // Can only address those 8 bit registers if a REX byte is present 667 669 cs->Irex |= REX; 668 670 code_newreg(cs, reg); // OR in reg field 669 671 if (!I16) branches/dmd-1.x/src/backend/cod2.c
r768 r771 3762 3762 if (s->ty() & mTYcs) 3763 3763 fl = FLcsdata; 3764 3764 c = gen2(c,0x8C, /* MOV mreg,SEG REGISTER */ 3765 3765 modregrm(3,segfl[fl],mreg)); 3766 3766 } 3767 3767 if (*pretregs & mES) 3768 3768 gen2(c,0x8E,modregrm(3,0,mreg)); /* MOV ES,mreg */ 3769 3769 } 3770 3770 return cat(c,getoffset(e,lreg)); 3771 3771 } 3772 3772 3773 3773 /********************************* 3774 3774 * Load the offset portion of the address represented by e into 3775 3775 * reg. 3776 3776 */ 3777 3777 3778 3778 code *getoffset(elem *e,unsigned reg) 3779 3779 { code cs; 3780 3780 code *c; 3781 3781 3782 //printf("getoffset(e = %p, reg = %d)\n", e, reg); 3782 3783 cs.Iflags = 0; 3783 3784 unsigned char rex = 0; 3784 3785 cs.Irex = rex; 3785 3786 assert(e->Eoper == OPvar || e->Eoper == OPrelconst); 3786 3787 enum FL fl = el_fl(e); 3787 3788 switch (fl) 3788 3789 { 3789 3790 case FLdatseg: 3790 3791 cs.IEV2._EP.Vpointer = e->EV.Vpointer; 3791 3792 goto L3; 3792 3793 3793 3794 case FLfardata: 3794 3795 assert(!TARGET_FLAT); 3795 3796 goto L4; 3796 3797 3797 3798 case FLtlsdata: 3798 3799 #if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_SOLARIS 3799 3800 { 3800 3801 L5: 3801 3802 if (I64 && config.flags3 & CFG3pic) … … 3900 3901 case FLcsdata: 3901 3902 L4: 3902 3903 cs.IEVsym2 = e->EV.sp.Vsym; 3903 3904 cs.IEVoffset2 = e->EV.sp.Voffset; 3904 3905 L3: 3905 3906 if (reg == STACK) 3906 3907 { stackchanged = 1; 3907 3908 cs.Iop = 0x68; /* PUSH immed16 */ 3908 3909 c = genadjesp(NULL,REGSIZE); 3909 3910 } 3910 3911 else 3911 3912 { cs.Iop = 0xB8 + (reg & 7); // MOV reg,immed16 3912 3913 if (reg & 8) 3913 3914 cs.Irex |= REX_B; 3914 3915 if (I64) 3915 3916 { cs.Irex |= REX_W; 3916 3917 if (config.flags3 & CFG3pic) 3917 3918 { // LEA reg,immed32[RIP] 3918 3919 cs.Iop = 0x8D; 3919 3920 cs.Irm = modregrm(0,reg & 7,5); 3921 if (reg & 8) 3922 cs.Irex = (cs.Irex & ~REX_B) | REX_R; 3920 3923 cs.IFL1 = fl; 3921 3924 cs.IEVsym1 = cs.IEVsym2; 3922 3925 cs.IEVoffset1 = cs.IEVoffset2; 3923 3926 } 3924 3927 } 3925 3928 c = NULL; 3926 3929 } 3927 3930 cs.Iflags = CFoff; /* want offset only */ 3928 3931 cs.IFL2 = fl; 3929 3932 c = gen(c,&cs); 3930 3933 break; 3931 3934 3932 3935 #if 0 && TARGET_LINUX 3933 3936 case FLgot: 3934 3937 case FLgotoff: 3935 3938 { 3936 3939 gotref = 1; 3937 3940 symbol *s = e->EV.sp.Vsym; 3938 3941 // When using 8B (MOV), indicating that rm is used 3939 3942 // rm operands are always placed in IEV1 not IEV2 branches/dmd-1.x/src/backend/cod3.c
r768 r771 5208 5208 } 5209 5209 5210 5210 void code::print() 5211 5211 { 5212 5212 unsigned char ins; 5213 5213 code *c = this; 5214 5214 5215 5215 if (c == CNIL) 5216 5216 { printf("code 0\n"); 5217 5217 return; 5218 5218 } 5219 5219 5220 5220 unsigned op = c->Iop; 5221 5221 if ((c->Iop & 0xFF00) == 0x0F00) 5222 5222 ins = inssize2[op & 0xFF]; 5223 5223 else 5224 5224 ins = inssize[op & 0xFF]; 5225 5225 5226 5226 printf("code %p: nxt=%p ",c,code_next(c)); 5227 5227 if (c->Irex) 5228 printf("rex=%x ", c->Irex); 5228 { printf("rex=%x ", c->Irex); 5229 if (c->Irex & REX_W) 5230 printf("W"); 5231 if (c->Irex & REX_R) 5232 printf("R"); 5233 if (c->Irex & REX_X) 5234 printf("X"); 5235 if (c->Irex & REX_B) 5236 printf("B"); 5237 printf(" "); 5238 } 5229 5239 printf("op=%02x",op); 5230 5240 5231 5241 if ((op & 0xFF) == ESCAPE) 5232 5242 { if ((op & 0xFF00) == ESClinnum) 5233 5243 { printf(" linnum = %d\n",c->IEV2.Vsrcpos.Slinnum); 5234 5244 return; 5235 5245 } 5236 5246 printf(" ESCAPE %d",c->Iop >> 8); 5237 5247 } 5238 5248 if (c->Iflags) 5239 5249 printf(" flg=%x",c->Iflags); 5240 5250 if (ins & M) 5241 5251 { unsigned rm = c->Irm; 5242 5252 printf(" rm=%02x=%d,%d,%d",rm,(rm>>6)&3,(rm>>3)&7,rm&7); 5243 5253 if (!I16 && issib(rm)) 5244 5254 { unsigned char sib = c->Isib; 5245 5255 printf(" sib=%02x=%d,%d,%d",sib,(sib>>6)&3,(sib>>3)&7,sib&7); 5246 5256 } 5247 5257 if ((rm & 0xC7) == BPRM || (rm & 0xC0) == 0x80 || (rm & 0xC0) == 0x40) 5248 5258 { branches/dmd-1.x/src/backend/cod4.c
r768 r771 1974 1974 { cl = getlvalue(&cs,e1,RMload); 1975 1975 freenode(e1); 1976 1976 if (evalinregister(e2)) 1977 1977 { 1978 1978 retregs = idxregm(&cs); 1979 1979 if ((cs.Iflags & CFSEG) == CFes) 1980 1980 retregs |= mES; /* take no chances */ 1981 1981 rretregs = allregs & ~retregs; 1982 1982 if (byte) 1983 1983 rretregs &= BYTEREGS; 1984 1984 cr = scodelem(e2,&rretregs,retregs,TRUE); 1985 1985 cs.Iop = 0x39 ^ byte ^ reverse; 1986 1986 if (sz > REGSIZE) 1987 1987 { 1988 1988 rreg = findregmsw(rretregs); 1989 1989 cs.Irm |= modregrm(0,rreg,0); 1990 1990 getlvalue_msw(&cs); 1991 1991 c = gen(CNIL,&cs); /* CMP EA+2,rreg */ 1992 1992 if (I32 && sz == 6) 1993 1993 c->Iflags |= CFopsize; /* seg is only 16 bits */ 1994 if (I64 && byte && rreg >= 4) 1995 c->Irex |= REX; 1994 1996 genjmp(c,JNE,FLcode,(block *) ce); /* JNE nop */ 1995 1997 rreg = findreglsw(rretregs); 1996 1998 NEWREG(cs.Irm,rreg); 1997 1999 getlvalue_lsw(&cs); 1998 2000 } 1999 2001 else 2000 2002 { 2001 2003 rreg = findreg(rretregs); 2002 2004 code_newreg(&cs, rreg); 2005 if (I64 && byte && rreg >= 4) 2006 cs.Irex |= REX; 2003 2007 } 2004 2008 } 2005 2009 else 2006 2010 { 2007 2011 cs.Irm |= modregrm(0,7,0); 2008 2012 if (sz > REGSIZE) 2009 2013 { 2010 2014 #if TARGET_FLAT 2011 2015 if (sz == 6) 2012 2016 assert(0); 2013 2017 #endif 2014 2018 if (e2->Eoper == OPrelconst) 2015 2019 { cs.Iflags = (cs.Iflags & ~(CFoff | CFseg)) | CFseg; 2016 2020 cs.IEVoffset2 = 0; 2017 2021 } 2018 2022 getlvalue_msw(&cs); 2019 2023 c = gen(CNIL,&cs); /* CMP EA+2,const */ 2020 2024 if (!I16 && sz == 6) 2021 2025 c->Iflags |= CFopsize; /* seg is only 16 bits */ 2022 2026 genjmp(c,JNE,FLcode,(block *) ce); /* JNE nop */ branches/dmd-1.x/src/backend/el.c
r768 r771 2958 2958 case TYdouble: 2959 2959 case TYfloat: 2960 2960 case TYildouble: 2961 2961 case TYidouble: 2962 2962 case TYifloat: 2963 2963 case TYcldouble: 2964 2964 case TYcdouble: 2965 2965 case TYcfloat: 2966 2966 #if !DDRT 2967 2967 result = (targ_llong)el_toldouble(e); 2968 2968 #else 2969 2969 result = Xxtoi(el_toldouble(e)); 2970 2970 #endif 2971 2971 break; 2972 2972 2973 2973 #if SCPP 2974 2974 case TYmemptr: 2975 2975 ty = tybasic(tym_conv(e->ET)); 2976 2976 goto L1; 2977 2977 #endif 2978 2979 case TYcent: 2980 case TYucent: 2981 goto Ullong; // should do better than this when actually doing arithmetic on cents 2982 2978 2983 default: 2979 2984 #if SCPP 2980 2985 // Can happen as result of syntax errors 2981 2986 assert(errcnt); 2982 2987 #else 2983 2988 #ifdef DEBUG 2984 2989 elem_print(e); 2985 2990 *(char*)0=0; 2986 2991 #endif 2987 2992 assert(0); 2988 2993 #endif 2989 2994 } 2990 2995 return result; 2991 2996 } 2992 2997 2993 2998 /*********************************** 2994 2999 * Determine if constant e is all ones or all zeros. 2995 3000 * Input: 2996 3001 * bit 0: all zeros 2997 3002 * 1: 1 branches/dmd-1.x/src/iasm.c
r714 r771 893 893 894 894 STATIC opflag_t asm_determine_float_flags(OPND *popnd) 895 895 { 896 896 //printf("asm_determine_float_flags()\n"); 897 897 898 898 opflag_t us, usFloat; 899 899 900 900 // Insure that if it is a register, that it is not a normal processor 901 901 // register. 902 902 903 903 if (popnd->base && 904 904 !popnd->s && !popnd->disp && !popnd->real 905 905 && !(popnd->base->ty & (_r8 | _r16 | _r32))) 906 906 { 907 907 return popnd->base->ty; 908 908 } 909 909 if (popnd->pregDisp1 && !popnd->base) 910 910 { 911 911 us = asm_float_type_size(popnd->ptype, &usFloat); 912 912 //printf("us = x%x, usFloat = x%x\n", us, usFloat); 913 if (popnd->pregDisp1->ty & _r32)913 if (popnd->pregDisp1->ty & (_r32 | _r64)) 914 914 return(CONSTRUCT_FLAGS(us, _m, _addr32, usFloat)); 915 915 else 916 916 if (popnd->pregDisp1->ty & _r16) 917 917 return(CONSTRUCT_FLAGS(us, _m, _addr16, usFloat)); 918 918 } 919 919 else if (popnd->s != 0) 920 920 { 921 921 us = asm_float_type_size(popnd->ptype, &usFloat); 922 922 return CONSTRUCT_FLAGS(us, _m, _normal, usFloat); 923 923 } 924 924 925 925 if (popnd->segreg) 926 926 { 927 927 us = asm_float_type_size(popnd->ptype, &usFloat); 928 928 if (I16) 929 929 return(CONSTRUCT_FLAGS(us, _m, _addr16, usFloat)); 930 930 else 931 931 return(CONSTRUCT_FLAGS(us, _m, _addr32, usFloat)); 932 932 } 933 933 trunk/src/backend/cod1.c
r770 r771 630 630 !(i == DX && op == 0xF7 && desmsk & mDX)) 631 631 { 632 632 /* if ES, then it can only be a load */ 633 633 if (i == ES) 634 634 { if (op != 0x8B) 635 635 goto L1; /* not a load */ 636 636 cs->Iop = 0x8C; /* MOV reg,ES */ 637 637 cs->Irm = modregrm(3,0,reg & 7); 638 638 if (reg & 8) 639 639 code_orrex(cs, REX_B); 640 640 } 641 641 else // XXX reg,i 642 642 { 643 643 cs->Irm = modregrm(3,reg & 7,i & 7); 644 644 if (reg & 8) 645 645 cs->Irex |= REX_R; 646 646 if (i & 8) 647 647 cs->Irex |= REX_B; 648 648 if (sz == 1 && I64 && i >= 4) 649 649 cs->Irex |= REX; 650 if (I64 && (sz == 8 || sz == 16)) 651 cs->Irex |= REX_W; 650 652 } 651 653 c = CNIL; 652 654 goto L2; 653 655 } 654 656 rm &= ~mask[i]; 655 657 } 656 658 } 657 659 } 658 660 659 661 L1: 660 662 c = getlvalue(cs,e,keepmsk); 661 663 if (offset == REGSIZE) 662 664 getlvalue_msw(cs); 663 665 else 664 666 cs->IEVoffset1 += offset; 665 667 if (I64 && reg >= 4 && sz == 1) // if byte register 666 668 // Can only address those 8 bit registers if a REX byte is present 667 669 cs->Irex |= REX; 668 670 code_newreg(cs, reg); // OR in reg field 669 671 if (!I16) trunk/src/backend/cod2.c
r768 r771 3762 3762 if (s->ty() & mTYcs) 3763 3763 fl = FLcsdata; 3764 3764 c = gen2(c,0x8C, /* MOV mreg,SEG REGISTER */ 3765 3765 modregrm(3,segfl[fl],mreg)); 3766 3766 } 3767 3767 if (*pretregs & mES) 3768 3768 gen2(c,0x8E,modregrm(3,0,mreg)); /* MOV ES,mreg */ 3769 3769 } 3770 3770 return cat(c,getoffset(e,lreg)); 3771 3771 } 3772 3772 3773 3773 /********************************* 3774 3774 * Load the offset portion of the address represented by e into 3775 3775 * reg. 3776 3776 */ 3777 3777 3778 3778 code *getoffset(elem *e,unsigned reg) 3779 3779 { code cs; 3780 3780 code *c; 3781 3781 3782 //printf("getoffset(e = %p, reg = %d)\n", e, reg); 3782 3783 cs.Iflags = 0; 3783 3784 unsigned char rex = 0; 3784 3785 cs.Irex = rex; 3785 3786 assert(e->Eoper == OPvar || e->Eoper == OPrelconst); 3786 3787 enum FL fl = el_fl(e); 3787 3788 switch (fl) 3788 3789 { 3789 3790 case FLdatseg: 3790 3791 cs.IEV2._EP.Vpointer = e->EV.Vpointer; 3791 3792 goto L3; 3792 3793 3793 3794 case FLfardata: 3794 3795 assert(!TARGET_FLAT); 3795 3796 goto L4; 3796 3797 3797 3798 case FLtlsdata: 3798 3799 #if TARGET_LINUX || TARGET_OSX || TARGET_FREEBSD || TARGET_SOLARIS 3799 3800 { 3800 3801 L5: 3801 3802 if (I64 && config.flags3 & CFG3pic) … … 3900 3901 case FLcsdata: 3901 3902 L4: 3902 3903 cs.IEVsym2 = e->EV.sp.Vsym; 3903 3904 cs.IEVoffset2 = e->EV.sp.Voffset; 3904 3905 L3: 3905 3906 if (reg == STACK) 3906 3907 { stackchanged = 1; 3907 3908 cs.Iop = 0x68; /* PUSH immed16 */ 3908 3909 c = genadjesp(NULL,REGSIZE); 3909 3910 } 3910 3911 else 3911 3912 { cs.Iop = 0xB8 + (reg & 7); // MOV reg,immed16 3912 3913 if (reg & 8) 3913 3914 cs.Irex |= REX_B; 3914 3915 if (I64) 3915 3916 { cs.Irex |= REX_W; 3916 3917 if (config.flags3 & CFG3pic) 3917 3918 { // LEA reg,immed32[RIP] 3918 3919 cs.Iop = 0x8D; 3919 3920 cs.Irm = modregrm(0,reg & 7,5); 3921 if (reg & 8) 3922 cs.Irex = (cs.Irex & ~REX_B) | REX_R; 3920 3923 cs.IFL1 = fl; 3921 3924 cs.IEVsym1 = cs.IEVsym2; 3922 3925 cs.IEVoffset1 = cs.IEVoffset2; 3923 3926 } 3924 3927 } 3925 3928 c = NULL; 3926 3929 } 3927 3930 cs.Iflags = CFoff; /* want offset only */ 3928 3931 cs.IFL2 = fl; 3929 3932 c = gen(c,&cs); 3930 3933 break; 3931 3934 3932 3935 #if 0 && TARGET_LINUX 3933 3936 case FLgot: 3934 3937 case FLgotoff: 3935 3938 { 3936 3939 gotref = 1; 3937 3940 symbol *s = e->EV.sp.Vsym; 3938 3941 // When using 8B (MOV), indicating that rm is used 3939 3942 // rm operands are always placed in IEV1 not IEV2 trunk/src/backend/cod3.c
r768 r771 5208 5208 } 5209 5209 5210 5210 void code::print() 5211 5211 { 5212 5212 unsigned char ins; 5213 5213 code *c = this; 5214 5214 5215 5215 if (c == CNIL) 5216 5216 { printf("code 0\n"); 5217 5217 return; 5218 5218 } 5219 5219 5220 5220 unsigned op = c->Iop; 5221 5221 if ((c->Iop & 0xFF00) == 0x0F00) 5222 5222 ins = inssize2[op & 0xFF]; 5223 5223 else 5224 5224 ins = inssize[op & 0xFF]; 5225 5225 5226 5226 printf("code %p: nxt=%p ",c,code_next(c)); 5227 5227 if (c->Irex) 5228 printf("rex=%x ", c->Irex); 5228 { printf("rex=%x ", c->Irex); 5229 if (c->Irex & REX_W) 5230 printf("W"); 5231 if (c->Irex & REX_R) 5232 printf("R"); 5233 if (c->Irex & REX_X) 5234 printf("X"); 5235 if (c->Irex & REX_B) 5236 printf("B"); 5237 printf(" "); 5238 } 5229 5239 printf("op=%02x",op); 5230 5240 5231 5241 if ((op & 0xFF) == ESCAPE) 5232 5242 { if ((op & 0xFF00) == ESClinnum) 5233 5243 { printf(" linnum = %d\n",c->IEV2.Vsrcpos.Slinnum); 5234 5244 return; 5235 5245 } 5236 5246 printf(" ESCAPE %d",c->Iop >> 8); 5237 5247 } 5238 5248 if (c->Iflags) 5239 5249 printf(" flg=%x",c->Iflags); 5240 5250 if (ins & M) 5241 5251 { unsigned rm = c->Irm; 5242 5252 printf(" rm=%02x=%d,%d,%d",rm,(rm>>6)&3,(rm>>3)&7,rm&7); 5243 5253 if (!I16 && issib(rm)) 5244 5254 { unsigned char sib = c->Isib; 5245 5255 printf(" sib=%02x=%d,%d,%d",sib,(sib>>6)&3,(sib>>3)&7,sib&7); 5246 5256 } 5247 5257 if ((rm & 0xC7) == BPRM || (rm & 0xC0) == 0x80 || (rm & 0xC0) == 0x40) 5248 5258 { trunk/src/backend/cod4.c
r768 r771 1974 1974 { cl = getlvalue(&cs,e1,RMload); 1975 1975 freenode(e1); 1976 1976 if (evalinregister(e2)) 1977 1977 { 1978 1978 retregs = idxregm(&cs); 1979 1979 if ((cs.Iflags & CFSEG) == CFes) 1980 1980 retregs |= mES; /* take no chances */ 1981 1981 rretregs = allregs & ~retregs; 1982 1982 if (byte) 1983 1983 rretregs &= BYTEREGS; 1984 1984 cr = scodelem(e2,&rretregs,retregs,TRUE); 1985 1985 cs.Iop = 0x39 ^ byte ^ reverse; 1986 1986 if (sz > REGSIZE) 1987 1987 { 1988 1988 rreg = findregmsw(rretregs); 1989 1989 cs.Irm |= modregrm(0,rreg,0); 1990 1990 getlvalue_msw(&cs); 1991 1991 c = gen(CNIL,&cs); /* CMP EA+2,rreg */ 1992 1992 if (I32 && sz == 6) 1993 1993 c->Iflags |= CFopsize; /* seg is only 16 bits */ 1994 if (I64 && byte && rreg >= 4) 1995 c->Irex |= REX; 1994 1996 genjmp(c,JNE,FLcode,(block *) ce); /* JNE nop */ 1995 1997 rreg = findreglsw(rretregs); 1996 1998 NEWREG(cs.Irm,rreg); 1997 1999 getlvalue_lsw(&cs); 1998 2000 } 1999 2001 else 2000 2002 { 2001 2003 rreg = findreg(rretregs); 2002 2004 code_newreg(&cs, rreg); 2005 if (I64 && byte && rreg >= 4) 2006 cs.Irex |= REX; 2003 2007 } 2004 2008 } 2005 2009 else 2006 2010 { 2007 2011 cs.Irm |= modregrm(0,7,0); 2008 2012 if (sz > REGSIZE) 2009 2013 { 2010 2014 #if TARGET_FLAT 2011 2015 if (sz == 6) 2012 2016 assert(0); 2013 2017 #endif 2014 2018 if (e2->Eoper == OPrelconst) 2015 2019 { cs.Iflags = (cs.Iflags & ~(CFoff | CFseg)) | CFseg; 2016 2020 cs.IEVoffset2 = 0; 2017 2021 } 2018 2022 getlvalue_msw(&cs); 2019 2023 c = gen(CNIL,&cs); /* CMP EA+2,const */ 2020 2024 if (!I16 && sz == 6) 2021 2025 c->Iflags |= CFopsize; /* seg is only 16 bits */ 2022 2026 genjmp(c,JNE,FLcode,(block *) ce); /* JNE nop */ trunk/src/backend/el.c
r768 r771 2958 2958 case TYdouble: 2959 2959 case TYfloat: 2960 2960 case TYildouble: 2961 2961 case TYidouble: 2962 2962 case TYifloat: 2963 2963 case TYcldouble: 2964 2964 case TYcdouble: 2965 2965 case TYcfloat: 2966 2966 #if !DDRT 2967 2967 result = (targ_llong)el_toldouble(e); 2968 2968 #else 2969 2969 result = Xxtoi(el_toldouble(e)); 2970 2970 #endif 2971 2971 break; 2972 2972 2973 2973 #if SCPP 2974 2974 case TYmemptr: 2975 2975 ty = tybasic(tym_conv(e->ET)); 2976 2976 goto L1; 2977 2977 #endif 2978 2979 case TYcent: 2980 case TYucent: 2981 goto Ullong; // should do better than this when actually doing arithmetic on cents 2982 2978 2983 default: 2979 2984 #if SCPP 2980 2985 // Can happen as result of syntax errors 2981 2986 assert(errcnt); 2982 2987 #else 2983 2988 #ifdef DEBUG 2984 2989 elem_print(e); 2985 2990 *(char*)0=0; 2986 2991 #endif 2987 2992 assert(0); 2988 2993 #endif 2989 2994 } 2990 2995 return result; 2991 2996 } 2992 2997 2993 2998 /*********************************** 2994 2999 * Determine if constant e is all ones or all zeros. 2995 3000 * Input: 2996 3001 * bit 0: all zeros 2997 3002 * 1: 1 trunk/src/iasm.c
r714 r771 893 893 894 894 STATIC opflag_t asm_determine_float_flags(OPND *popnd) 895 895 { 896 896 //printf("asm_determine_float_flags()\n"); 897 897 898 898 opflag_t us, usFloat; 899 899 900 900 // Insure that if it is a register, that it is not a normal processor 901 901 // register. 902 902 903 903 if (popnd->base && 904 904 !popnd->s && !popnd->disp && !popnd->real 905 905 && !(popnd->base->ty & (_r8 | _r16 | _r32))) 906 906 { 907 907 return popnd->base->ty; 908 908 } 909 909 if (popnd->pregDisp1 && !popnd->base) 910 910 { 911 911 us = asm_float_type_size(popnd->ptype, &usFloat); 912 912 //printf("us = x%x, usFloat = x%x\n", us, usFloat); 913 if (popnd->pregDisp1->ty & _r32)913 if (popnd->pregDisp1->ty & (_r32 | _r64)) 914 914 return(CONSTRUCT_FLAGS(us, _m, _addr32, usFloat)); 915 915 else 916 916 if (popnd->pregDisp1->ty & _r16) 917 917 return(CONSTRUCT_FLAGS(us, _m, _addr16, usFloat)); 918 918 } 919 919 else if (popnd->s != 0) 920 920 { 921 921 us = asm_float_type_size(popnd->ptype, &usFloat); 922 922 return CONSTRUCT_FLAGS(us, _m, _normal, usFloat); 923 923 } 924 924 925 925 if (popnd->segreg) 926 926 { 927 927 us = asm_float_type_size(popnd->ptype, &usFloat); 928 928 if (I16) 929 929 return(CONSTRUCT_FLAGS(us, _m, _addr16, usFloat)); 930 930 else 931 931 return(CONSTRUCT_FLAGS(us, _m, _addr32, usFloat)); 932 932 } 933 933
